1. Cross References
Method of Forming Shallow Junction Semiconductor Devices by Joseph J. Chang, et al. filed concurrently with the present patent application and having Ser. No. 765,328, filed Oct. 7, 1968, now U.S. Pat. No. 3,607,468. Said application also divided into application Ser. No. 135,680, and now U.S. Pat. No. 3,778,687.
Heterogenous Integrated Circuits by M. C. Duffy, et al., Ser. No. 750,650, filed Aug. 6, 1968, now U.S. Pat. No. 3,655,457.